(Hong Kong)
Product Summary
The EPM7128AETC10010N is a high-density, high-performance, Programmable Logic Device based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EPM7128AETC10010N operates with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. The EPM7128AETC10010N in the -4, -5, -6, -7, and some -10 speed grades are compatible with the timing requirements for 33 MHz operation of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification.
Parametrics
EPM7128AETC10010N absolute maximum ratings: (1)VCC, supply voltage: -0.5 to 4.6V; (2)VI, DC input voltage: –2.0 to 5.75 V; (3)IOUT, DC output current, per pin: –25 to 25 mA; (4)TSTG, Storage temperature No bias: –65 to 150℃; (5)TA, Ambient temperature Under bias: –65 to 135℃; (6)TJ, Junction temperature: 135℃.
Features
EPM7128AETC10010N features: (1)High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAXR) architecture; (2)3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability; (3)Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1; (4)Supports JEDEC Jam Standard Test and Programming Language(STAPL) JESD-71; (5)Enhanced ISP features; (6)Pin-compatible with the popular 5.0-V MAX 7000S devices; (7)High-density PLDs ranging from 600 to 10,000 usable gates; (8)Extended temperature range.
Diagrams
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