Product Summary

The IDT71V416L12PHI is a 4,194,304-bit high-speed Static RAM organized as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for highspeed memory needs. The IDT71V416L12PHI has an output enable pin which operates as fast as 5ns, with address access times as fast as 10ns. All bidirectional inputs and outputs of the IDT71V416L12PHI are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. The IDT71V416L12PHI is packaged in a 44-pin, 400 mil Plastic SOJ and a 44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x 9mm package.

Parametrics

IDT71V416L12PHI absolute maximum ratings:(1)Supply Voltage Relative to VSS, VDD: -0.5 to +4.6V; (2)Terminal Voltage Relative to VSS, VIN, VOUT: -0.5 to VDD+0.5V; (3)Temperature Under Bias, TBIAS: -55 to +125℃; (4)Storage Temperature, TSTG: -55 to +125℃; (5)Power Dissipation, PT: 1W; (6)DC Output Current, IOUT: 50mA.

Features

IDT71V416L12PHI features: (1)256K x 16 advanced high-speed CMOS Static RAM; (2)JEDEC Center Power / GND pinout for reduced noise; (3)Equal access and cycle times: Commercial and Industrial: 10/12/15ns; (4)One Chip Select plus one Output Enable pin; (5)Bidirectional data inputs and outputs directly LVTTL-compatible; (6)Low power consumption via chip deselect; (7)Upper and Lower Byte Enable Pins; (8)Single 3.3V power supply; (9)Available in 44-pin, 400 mil plastic SOJ package and a 44-pin, 400 mil TSOP Type II package and a 48 ball grid array,; (10)9mm x 9mm package.

Diagrams

IDT71V416L12PHI block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
IDT71V416L12PHI
IDT71V416L12PHI


IC SRAM 4MBIT 12NS 44TSOP

Data Sheet

Negotiable 
IDT71V416L12PHI8
IDT71V416L12PHI8


IC SRAM 4MBIT 12NS 44TSOP

Data Sheet

Negotiable